Single Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Dual Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Single Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Dual Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Single Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Dual Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Single Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Dual Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Single Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Dual Port Memory Compilers

• Synchronous reads/writes
• Static design with zero standby current (except transistor leakage)
• Ability to compile to multiple aspect ratios
• RAMpiler+® with row and column redundancy of up to 2 quad rows & 2 columns I/O
• No restriction and Fully routable over the array with higher metal layers
• Small set-up and zero hold times
• Power ring size based on frequency of operation and load
• Up to 1.1 Mbit single instance
• Up to 288 bit word
• Up to 16K words deep
• Multiple pin placement and layer options
• Multiple power ring metal layer and configuration options
• Register output options
• Pos. or Neg. Clock Edge
• Multiple output drive strengths
• Different power ring design configurations
• Power ring based on frequency
• Power Mesh on different Metal layers
• Bit Write Mask, Byte Write or Word (global write) options
• Write through, transparent write
• BIST Mux option on inputs
• Row redundancy (RAMpiler+®)
• Column I/O redundancy (RAMpiler+®)
• ECC enabled and capable (SEC, SECDED, OP, EP)

Read Only Memory Compilers

• Diffusion ROM compiler
• Via Programmable ROM compiler

Content Addressable Memory Compilers

• Binary BCAM, Ternary TCAM, and CAM compilers using CAMpiler® technology

Specialty Memory

• Custom Register Files with different configurations such as: 1W/4R, 3W/3R, 1W/8R, 2W/4R, 3W/5R, etc.