DDR PHY
Dolphin's hardened DDR4/3/2 SDRAM PHY and LPDDR4/3/2 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 4266 Mbps. It is fully compliant with the DFI 4.0 specification, and features include slew rate control, per-bit de-skew, gate training,
read and write leveling and built-in self test (BIST).
In addition, our PHY IP is optimized to provide a complete solution when combined with Dolphin's DDRx and LPDDRx SDRAM Memory Controller IP.

TSMC
Technology Levels
The hardened PHY macros are currently available in the following technology levels:
Click on the data for detailed chart