Octal SPI Controller
Dolphin Octa SPI Controller and PHY IP supports the fastest access frequency of 200MHz, with DDR Mode and Double Transfer Rate (DTR) Protocol enabling data transfer rates up to 400Mbps with reduced read latency, including support for Octal DDR protocol with DQS for Octal SPI devices. The Controller and PHY IP connects to a system-on-chip (SoC) host through an AMBA® APB bus for the register interface and optional DMA peripheral interface.
Octa SPI Controller IP supports many type of OSPI device from different vendors such as Micron Xccela, APMemory PSRAM, Windbond, Macronix,... This IP can be used flexibly in any application and high performance.
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- Features
- Design Status
- Compliant with the following specifications:
- AMBA, Advanced Peripheral Bus (APB) Specification Version 2.0
- AMBA, Advanced High-performance Bus (AHB) Specification Version 2.0
- AMBA, Advanced eXtensibale Bus (AXI) Specification Version 4.0
- AMBA, Advanced eXtensibale Lite Bus (AXI-Lite) Specification Version 4.0
- DTI Octal-SPI Controller supports:
- Master only operation
- Slave only operation
- Master and slave operation
- Clock synchronization
- Programmable FIFO watermarks
- Interrupt interface
- Data Sheets are available under NDA
- REQUEST NDA